Microelectronic devices are used in cell phones, pagers, personal digital assistants, computers, and many other products. A die-level packaged microelectronic device can include a microelectronic die, an interposer substrate or lead frame attached to the die, and a molded casing around the die. The microelectronic die generally has an integrated circuit and a number of bond-pads coupled to the integrated circuit. The bond-pads are coupled to terminals on the interposer substrate or lead frame. The interposer substrate can also include system interconnect pads coupled to the terminals by traces in a dielectric material. An array of solder balls is configured so that each solder ball contacts a corresponding system interconnect pad to define a “ball-grid” array. Packaged microelectronic devices with ball-grid arrays are generally higher grade packages that have lower profiles and higher pin counts than conventional chip packages that use a lead frame.
Packaged microelectronic devices are typically made by (a) forming a number of dice on a semiconductor wafer, (b) cutting the wafer to singulate the dice, (c) attaching an individual die to an individual interposer substrate, (d) wire-bonding the bond-pads to the terminals of the interposer substrate, and (e) encapsulating the dies with a molding compound. As the demand for higher pin counts and smaller packages increases, it becomes more difficult to (a) form robust wire-bonds that can withstand the forces involved in molding processes and (b) accurately form other components of die-level packaged devices. Therefore, packaging processes have become a significant factor in producing semiconductor and other microelectronic devices.
Electronic products require packaged microelectronic devices to have an extremely high density of components in a very limited space. For example, the space available for memory devices, processors, displays, and other microelectronic components is quite limited in cell phones, PDAs, portable computers, and many other products. As such, there is a strong drive to reduce the height of the packaged microelectronic device and the surface area or “footprint” of the microelectronic device on a printed circuit board. Reducing the size of the microelectronic device is difficult because high-performance microelectronic devices generally have more bond-pads, which result in larger ball-grid arrays and thus larger footprints.
Image sensors present additional packaging problems. Image sensors include an active area that is responsive to light or other electromagnetic radiation. In packaging, it is important to form a cover that protects the active area without obstructing or distorting the passage of light or other electromagnetic radiation to the active area. One existing method for packaging an image sensor die includes placing the die in a recess of a ceramic substrate and attaching a glass window to the substrate over the active area. The window is hermetically sealed to the substrate to enclose the image sensor die. A vacuum pump typically removes air from the gap between the image sensor die and the glass window. An inert gas can then be injected into the gap between the image sensor die and the glass window.
Another existing method for packaging image sensor dies by attaching and wire-bonding an array of image sensor dies to a carrier substrate. Next, a crystal window array is placed over the image sensor dice. The crystal window array includes sidewalls that are attached to the carrier substrate between the wire-bonds of adjacent dies and windows that extend between the sidewalls over corresponding dice. The substrate and the attached window array are then cut to form a number of individual image sensor packages.
One drawback of packaging image sensor dies in the above-mentioned methods is that the packaged image sensor dice are relatively bulky and, accordingly, use more space on a circuit board or other external device.
Thus, a need still remains for an integrated circuit package on package system that can provide a platform for image sensors, improve layout efficiency on the application printed circuit board, and improve thermal efficiency. In view of the overwhelming demand for more integrated circuit functions in smaller spaces, it is increasingly critical that answers be found to these problems. In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace, it is critical that answers be found for these problems. Additionally, the need to save costs, improve efficiencies and performance, and meet competitive pressures, adds an even greater urgency to the critical necessity for finding answers to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.